40nm SilvoFlashTM Technology for "Low Power & Ultra Low Power eFlash"

 

Macro IP Floor-Plan

The Macro IP could be designed with LP eFlash+eEEPROM function at 1.1V+2.5V+5V & 1.1V+5V platform, and LP eFlash at 1.1V+3.3V platform.

 

 

Macro IP Datasheet

Datasheet with eFlash density 16Mb=(512Kb+512x4) x (32+7) wtih ECC function in 1.1V+2.5V+5V platform.